PLCcore-9263 CODESYS

PLCcore-9263 CODESYS

The PLCcore-9263 CODESYS is a ready-to-use embedded ARM System on Module with Linux that combines a pre-integrated IEC 61131-3 runtime kernel with a CANopen Manager on one platform.

The pre-installed CODESYS V3.5 runtime system includes CANopen and Ethernet connectivity. Open interfaces allow for extending the run-time system with own functionalities. Integrated target visualization allows for displaying the operator and monitoring interface.

No CODESYS development licenses will be required. There is a free re-distribution of the CODESYS Automation Suite to end customers.

The PLCcore-9263 is ideally suited for HMI-enabled applications as well as intelligent network nodes for decentralized processing of process signals (CANopen and Ethernet). It provides a simple yet performance-optimized hardware platform combined with a production-ready, GUI-enabled operating system. The PLCcore-9263 has a very good price-performance ratio balancing cost and efficiency perfectly. Making PLC available as an insert-ready core module with small dimensions reduces effort and costs significantly for the development of user-specific controls.


The PLCcore-9263 is the right platform for a wide variety of embedded system design. Due to the comprehensive IEC 61131-3 technology and open interfaces this PLCcore gives its users a high degree of freedom in their developments.

The PLCcore-9263 CODESYS is a microprocessor sub-assembly combining all necessary hardware components, a pre-installed platform-optimized Linux and the IEC 61131-3 runtime system CODESYS V3.5 on an insert-ready System on Module.

The on-board firmware of the PLCcore-9263 contains the entire PLC runtime environment including CANopen connection with CANopen master functionality. Data and occurrences can be exchanged with other nodes (e.g. superior main controller, I/O slaves and so on) via CANopen network, Ethernet (UDP protocol) and serial interfaces (UART). Moreover, the number of in- and outputs either is locally extendable or decentralized via CANopen devices. For this purpose, the CANopen-Chip is suitable. It has also been designed as insert-ready core module for the appliance in user-specific applications.

The PLCcore-9263 CODESYS provides 16 digital inputs (DI0...DI15, 3.3V level), 8 digital outputs (DO0...DO7, 3.3V level) a scroll wheel input and 4x4 matrix keypad support. This default I/O configuration can be adapted for specific application requirements by using the Driver Development Kit (SO- 1103). Saving the PLC program in the on-board Flash-Disk of the module allows an automatic restart in case of power breakdown.

Programming the PLCcore-9263 takes place according to IEC 61131-3 using CODESYS V3.5 by the company 3S-Smart Software Solutions. CODESYS is a manufacturer independent IEC 61131-3 Development System which offers the complete functionality of a modern IEC 61131-3 development tool. It includes an integrated visualization with different clients, integrated connection to all standard fieldbus systems, motion functionality, safety solutions and communication interfaces.

The integrated CODESYS target visualization of the PLCcore-9263 allows the display of process values from the PLC and the forwarding of user actions to the PLC (e.g. input via touch screen, matrix keypad and scroll wheel).

It is possible to program the PLCcore-9263 graphically in LD/FBB, SFC and CFC or textually in IL or ST. Downloading the PLC program onto the module takes place via Ethernet. Addressing in- and outputs and creating a process image follows the SYS TEC electronic scheme for compact control units (see The PLCcore Concept Whitepaper) . Like all other SYS TEC electronic controls, the PLCcore-9263 supports debug functionality including watching and setting variables, breakpoints and single steps.

Caratteristiche e Benefici
PLCcore Firmware: IEC61131-3
PLCcore-9263, CODESYS: 3S CODESYS V3.5, Linux, Qt optional, CANopen, TCP/IP, Program download and debugging via Ethernet
PLCcore-9263, CODESYS, HMI: 3S CODESYS V3.5, Linux, CODESYS Target Visualization, CANopen, TCP/IP, Program download and debugging via Ethernet
Controller: Atmel® AT91SAM9263 with ARM926EJ-S Core
System Clock: 220MIPS at 200MHz, 240MHz internal PLL clock
RAM: 64MiB SDR-SDRAM (32MiB optional),
32-bit data-bus
Video-RAM: 1MiB dedicated
FLASH: 256MiB NAND - 64MiB NOR (128MiB optional), 16-bit data-bus
On-board Peripherals: DMA, MMU, hardware watchdog, temperature sensor, RTC, touchscreen controller
Fast Ethernet: 1x 10/100Mbps, on-board PHY
CAN: 1
USB: 2x USB 2.0 host, 12Mbps full-speed
1x USB 2.0 device, 12Mbps full-speed
SPI/I2C: 2/1
Mass storage: Micro-SD on-board, MMC/SD-card signals on board-to-board connector
LCD: TFT-LCD interface brought out via CMOS and LVDS
Touch: Resistive, 12-bit, 4-wire interface
Others: SSC, AC97
Operating Conditions: Temperature: -40°C…+85°C
Humidity: 10-90% RH, non-condensing
Power Supply: 3.3V +/- 5%, 0.3A max.
Dimensions/Weight: 80 x 54 x 9,4 (L x W x H in mm), 20g
Board-to-board connector: 2x 2x 50 pin header socket, 1.27 mm pitch
Available on board-to-board connector: CAN, 3x ASC, 1x DBGU/ASC, USB device, 2x USB host, I²C, 2x SPI, AC97, 2x SD-card, 18x DIO, Ethernet, TFT-CMOS, Touch, LVDS, 3x PWM/DIO, 4x Timer/Counter/DIO
RoHS compliant: yes
Operating System: Linux with X server and QT framework
Integrated Development Environment (IDE): Pre-integrated Eclipse-based IDE with GNU C/C++ tool chain, source- and assembly-level debugger, IEC 61131-3 IDE CODESYS V3.5 with SYS TEC electronic vendor extensions