The PLCcore-5484 is an ideal basis for customized solutions. Based on the SYS TEC's SOM - ECUcore-5484, it allows for an integration of compact, Linux-based and extremely high-capacity Hard-PLC into own applications at low effort. With all necessary components already being preinstalled, no additional license costs will occur.


The PLCcore-5484 is an insert-ready OEM-able single board computer running Linux and a ready-to-use IEC 61131-3 runtime kernel together with a CANopen manager pre-installed. The module allows for integrating a compact and high-performance Hard-PLC into customized, user-specific applications with minimum efforts - without suffering from high cost caused by IEC 61131-3 development or resale licenses. The board combines all high-speed components on a compact Low-EMI-Multilayer circuit board. Due to its comprehensive and high-performance software, it is suitable for the usage in various industrial application fields.

Due to a freely programmable on-board CPLD, the interface to the periphery can be adjusted easily according to respective requirements. Hence, the PLCcore-5484 module is especially applicable where highest flexibility is needed.

In addition to basic digital in- and outputs, the CPLD can accomplish highly complex peripheral units. Thus, delivery of the PLC core module includes a basic CPLD version with essential in- and outputs as well as freely configurable counter and high-capacity PWM-units. VHDL-sources of the CPLD and the C-source code are available as Driver Development Kit (DDK). Consequently, it is possible to implement own I/O-connections whereas extension interfaces such as I²C and SPI buses can be accessed in addition to memory-mapped components. The performance of the process image as Shared Memory enables comfortable data exchange with other Linux programs that run in parallel to the PLC.

The large CANopen library of the PLCcore-5484 includes a CiA 302-conform CANopen Manager that supports automatic node configuration. Thus, flexible expandability of the PLC core module via CANopen units is easily made possible by Plug & Play. Furthermore, the PLCcore-5484 supports the CiA 314 device profile for "IEC 61131-2 programmable devices" (former CiA 405) and herewith allows for easy data exchange with other CANopen modules.

Due to its numerous on-board communication interfaces, the PLC core module is well-suited as central master unit within distributed automation systems and as communication gateway.

A quick and problem-free commissioning of the PLCcore-5484 is ensured by the corresponding PLC core Development Kit. It combines all hard- and software components that are necessary to create own applications.

Caratteristiche e Benefici

Module Features

PLCcore Firmware: IEC61131-3 runtime kernel pre-installed
Shared process image
CiA302/314 compliant CANopen manager
Customizable I/O driver
Program download via Ethernet or CANopen
Controller: Freescale MCF5484 MCU with Coldfire V4e core
System Clock: 200 MHz and 300+ MIPS
RAM: 64MB DDR-SDRAM (128MB optional)
FLASH: 16MB NOR (32MB optional)
FPGA Options: Lattice LFE2-6 or Lattice LFE2-20 MACH XO 640 (CPLD)
HMI Options: driver for dot-matrix display and 4x4 keypad
On-board Peripherals: DMA, MMU, hardware watchdog, temperature sensor, RTC
Fast Ethernet: 2x 10/100Mbps, 1x on-board PHY
CAN: 2
SPI/I2C: 1/1
Operating Conditions: Temperature: -40°C…+85°C
Humidity: 10-90% RH, non-condensing
Power Supply: 3.3V +/- 5%, 1.5A max.
Dimensions/Weight: 70 x 41.5 x 7.8 (L x W x H in mm) / 20g
Board-to-board connector: 2x 60 pin header socket, 0.5 mm pitch
Available on board-to-board connector: CAN, I²C, SPI, FlexBus, GPIO, 24 digital input lines, 22 digital output lines, 1 high-speed counter (pulse/dir or A/B), 1 PWM/PTO output (pulse/dir), Ethernet
RoHS compliant: yes
Operating System: Linux
Integrated Development Environment (IDE): Pre-integrated Eclipse-based IDE with GNU C/C++ tool chain, source- and assembly-level debugger, IEC 61131-3 IDE (OpenPCS) with SYS TEC vendor extensions
Complementary Middleware: CANopen® Protocol Stack Source Code
Ethernet POWERLINK Protocol Stack Source Code